<?xml version="1.0" encoding="ISO-8859-1"?>
<metadatalist>
	<metadata ReferenceType="Conference Proceedings">
		<site>sibgrapi.sid.inpe.br 802</site>
		<identifier>83LX3pFwXQZW44Lb/d4S7S</identifier>
		<repository>dpi.inpe.br/ambro/1998/05.06.14.50</repository>
		<lastupdate>1998:05.25.03.00.00 sid.inpe.br/banon/2001/03.30.15.38 administrator</lastupdate>
		<metadatarepository>sid.inpe.br/banon/2001/03.30.15.55.59</metadatarepository>
		<metadatalastupdate>2013:04.19.14.15.03 sid.inpe.br/banon/2001/03.30.15.38 administrator {D 1996}</metadatalastupdate>
		<isbn>85-244-0103-6</isbn>
		<citationkey>Barros:1996:MePrIm</citationkey>
		<title>Uma metodologia de projeto e implementação de operadores para processamento digital de imagens em tempo real usando field programmable gate arrays</title>
		<format>Impresso, On-line.</format>
		<year>1996</year>
		<numberoffiles>1</numberoffiles>
		<size>92 KiB</size>
		<author>Barros, Marcelo,</author>
		<editor>Velho, Luiz,</editor>
		<editor>Albuquerque, Arnaldo de,</editor>
		<editor>Lotufo, Roberto A.,</editor>
		<conferencename>Simpósio Brasileiro de Computação Gráfica e Processamento de Imagens, 9 (SIBGRAPI)</conferencename>
		<conferencelocation>Caxambu</conferencelocation>
		<date>29 out. - 1 nov. 1996</date>
		<publisher>Sociedade Brasileira de Computação</publisher>
		<publisheraddress>Porto Alegre</publisheraddress>
		<pages>297-304</pages>
		<booktitle>Anais</booktitle>
		<tertiarytype>Artigo</tertiarytype>
		<organization>SBC - Sociedade Brasileira de Computação; UFMG - Universidade Federal de Minas Gerais</organization>
		<transferableflag>1</transferableflag>
		<abstract>This paper presents an efficient approach to implement low-level image processing algorithms using a reconfigurable hardware technology. The Xilinx Field Programmable Gate Array (FPGA) circuits are used. We describe a synthesis method to generate separable 2D filter architectures on Xilinx FPGAs is evaluate. Time and area constraints are specially considered. An architecture is proposed which allows real time operation of large kernel filters. We present the implementation of a set of basic operators used to build current linear and non-linear (morphological) 2D filters.</abstract>
		<type>Processamento de Imagens</type>
		<language>pt</language>
		<targetfile>a68.pdf</targetfile>
		<usergroup>administrator</usergroup>
		<usergroup>banon</usergroup>
		<visibility>shown</visibility>
		<mirrorrepository>sid.inpe.br/sibgrapi@80/2007/08.02.16.22</mirrorrepository>
		<hostcollection>sid.inpe.br/banon/2001/03.30.15.38</hostcollection>
		<username>banon</username>
		<lasthostcollection>sid.inpe.br/banon/2001/03.30.15.38</lasthostcollection>
		<url>http://sibgrapi.sid.inpe.br/rep-/dpi.inpe.br/ambro/1998/05.06.14.50</url>
	</metadata>
</metadatalist>